How to Inspect Detailed CPU Microarchitecture and Cache Sizes in Linux Terminal Using cpuid

While standard Linux hardware reporting tools such as lscpu and /proc/cpuinfo offer accessible summaries of processor model names and core counts, they often abstract away low-level microarchitecture properties. When evaluating hardware-accelerated cryptography, virtual machine hypervisor pass-through capabilities, AVX-512 vector extension support, or debugging branch prediction mitigations, engineers require direct inspection of the x86 CPUID opcode registers (EAX, EBX, ECX, and EDX). The dedicated cpuid command-line utility in Linux queries every raw CPUID leaf and subleaf, decoding processor microcode features and cache hierarchies into a granular diagnostic dossier.

What Is the CPUID Opcode and Why Use cpuid?

The CPUID instruction is a native x86/x86_64 microprocessor feature that returns processor information when supplied with a specific leaf number loaded into the EAX register. The CPU hardware returns bitwise flags across 32-bit registers representing capabilities such as:

• Instruction Set Extensions (SSE4.2, AVX2, AVX-512, AMX, Intel SHA-NI, AES-NI).
• Hardware Virtualisation extensions (Intel VT-x / VMX, AMD SVM).
• Security architecture features (Intel SGX, AMD SME/SEV, Control-Flow Enforcement Technology CET).
• Exact Level 1, Level 2, and Level 3 cache associativity, line sizes, and sharing topology.
• Thermal monitor sensors, power management states, and clock throttling triggers.

The standalone cpuid utility executes these register queries directly against every individual hardware thread and parses the resulting bitfields into human-readable technical reports.

Installing cpuid on Linux Distributions

The cpuid package is available in the standard software repositories of virtually all major Linux distributions.

On Debian, Ubuntu, and Linux Mint systems, install it using apt:

sudo apt update
sudo apt install cpuid

On Fedora, RHEL, and Rocky Linux systems, install it via dnf:

sudo dnf install cpuid

On Arch Linux and Manjaro, install it with pacman:

sudo pacman -S cpuid

Running cpuid in Human-Readable Mode

Running the bare command cpuid dumps raw hexadecimal registers alongside decoded descriptions for every logical core present on your motherboard. On high-core-count servers or multi-threaded desktop processors, this generates thousands of lines.

To inspect a concise, human-readable summary of CPU features across the primary core without core-to-core duplication, pass the -1 flag (or --one-cpu):

cpuid -1

The decoded output categorises features systematically into sections:

• Vendor and Processor Family: Confirms genuine silicon origins (e.g. GenuineIntel or AuthenticAMD), microarchitecture stepping, model ID, and extended family indicators.
• Cache and TLB Descriptors: Outlines data Translation Lookaside Buffer (TLB) page entries, instruction TLBs, and individual cache parameters.
• Feature Flags: Reports whether specific instructions are supported (indicated by true or false flags).

Auditing Advanced Instruction Sets (AVX, Virtualisation, and Cryptography)

System architects frequently need to verify whether host nodes or cloud virtual machines support modern instruction extensions for machine learning, database indexing, or container virtualisation. You can isolate these instruction flags by filtering cpuid output:

Checking Vector Extensions (AVX2, AVX-512, AMX)

cpuid -1 | grep -iE "avx|amx"

Reviewing this output confirms whether advanced 512-bit vector processing blocks (such as AVX512F, AVX512CD, AVX512_VNNI) are physically wired and enabled by the system firmware.

Auditing Hardware Virtualisation Flags

cpuid -1 | grep -iE "vmx|svm|hypervisor"

This verification confirms whether hardware-assisted virtual machine acceleration is active (Intel VMX or AMD SVM), which is required to execute Kernel-based Virtual Machine (KVM) hypervisors and nested virtualisation environments.

Inspecting Hardware Cryptographic Acceleration

cpuid -1 | grep -iE "aes|sha|rdrand|rdseed"

Confirming that AES-NI, SHA-NI, and hardware true random number generators (RDRAND, RDSEED) are present ensures that filesystem encryption (dm-crypt/LUKS) and OpenSSL TLS handshakes offload cryptographic calculations directly to silicon without incurring CPU overhead.

Decoding Level 1, 2, and 3 Cache Geometry

Modern compilers, database performance tuning, and high-performance computing (HPC) workflows depend heavily on knowing exact cache topologies. Unlike generic tools that state only gross cache capacity, cpuid reveals the structural cache architecture:

cpuid -1 | grep -i -A 12 "cache and tlb"

Look specifically for the deterministic cache parameters (Leaf 0x00000004 for Intel or Leaf 0x8000001d for AMD). These disclose:

• Line Size: Typically 64 bytes, confirming memory burst cache line widths.
• Ways of Associativity: Indicates set associativity (e.g. 8-way, 12-way, or 16-way associative), illustrating how cache lines map to physical memory addresses.
• Physical Partitions and Sets: The exact row and set partition geometry of the cache array.
• Shared Threads: The number of logical processors that share a given cache slice (crucial for distinguishing between private L2 cache per core and unified shared L3 cache across CCX modules).

Exporting Raw Hexadecimal CPUID Registers for Virtualisation Profiles

When provisioning cloud hypervisors such as QEMU/KVM, Proxmox, or VMware ESXi, administrators often require the raw hexadecimal CPUID register mappings to construct custom CPU model definitions or bypass guest OS incompatibility restrictions. To generate raw hexadecimal CPUID dumps, pass the -r flag:

cpuid -r > ~/cpu_registers.hex

The resulting text file documents every CPUID function register in strict leaf subleaf: eax ebx ecx edx format, ready for ingestion into virtualisation CPU masking configurations and hardware simulation suites.